The present invention relates to a signal processing circuit for use in a mobile radio equipment terminal such as a pager, a cellular phone, or the like.
FIG. 3 is a block diagram illustrating a configuration of a CPU which is mounted in a signal processing circuit used in a conventional mobile radio equipment terminal. In the drawing, reference numeral 1 denotes an oscillator; 2, a waveform shaper constituted by a gain buffer or the like; 4, a CPU core portion; 5, a program ROM; 6, a RAM; and 7, an I/O buffer. In terms of its operation, first, after the waveform of a clock signal oscillated by the oscillator 1 is shaped by the waveform shaper 2, the clock signal is applied to the CPU core portion 4. Then, by using this clock signal as a reference clock, the CPU core portion 4 accesses the RAM 6 and the I/O buffer 7 in accordance with the contents of the program ROM 5, and effects desired signal processing.
With recent signal processing circuits, however, there has been a growing demand for high-speed signal processing and a compact circuit. In conjunction with this demand, in the conventional signal processing circuits as well, the circuits are designed in such a way that stray capacities of signal circuits, such as the waveform shaper 2, the CPU core portion 4, the program ROM 5, the RAM 6, and the like, are minimized. Consequently, the radiation of the electromagnetic wave may occur in the signal processing circuit. In addition, since this signal processing circuit is naturally used in combination with a receiver attached to the mobile radio equipment terminal, the signal processing circuit and the receiver are disposed in proximity to each other. Hence, there has been a problem in that the radiation constitutes noise components and deteriorate the signal-to-noise (S/N) ratio of the receiver, thereby appreciably degrading the reception performance.